About
Table of Contents
Education
Technical University of Braunschweig (Apr 2020 – Sep 2024)
Bachelor of Science in Computer and Communication Systems Engineering
- Thesis: Development and Implementation of an FPGA-Based SPI Debugger and Decoder for Space Missions
Technical University of Munich (Oct 2013 – Mar 2020)
Mechanical Engineering
- Thesis: Process Optimization through Mechatronic Systems in Production, Warehouse Logistics, and Quality Assurance of a Hardware Start-Up
Projects
Thesis: Satellite-Grade FPGA Logic Analyzer and Data Logger for SPI Debugging
Developed an integrated FPGA-based logic analyzer for debugging high-speed SPI communication in satellite and aerospace applications.
- Designed an AMBA-AXI compliant memory controller supporting BRAM, SDRAM, standalone soft-core processing, and USB data transfer.
- Implemented state-based triggering with multi-path activation, event detection, sequence tracking, and adaptable bus topology.
- Applied pipelining and parallelization to meet targeted throughput and timing constraints.
- Developed automated FPGA verification using VUnit, UVVM, and OSVVM for functional verification.
- Enabled real-time debugging by capturing SPI data over UART for external analysis.
- Applied ML-based anomaly detection to identify irregular SPI communication patterns, improving fault detection.
- Integrated unsupervised learning algorithms for clustering signal variations and classifying error patterns.
- Developed a predictive ML model to anticipate timing violations and bus contention issues.
- Optimized adaptive signal filtering using neural network-based pattern recognition.
- Ensured compliance with space and automotive-grade validation standards.
Cloud-Connected FPGA System for ML-Optimized Image Processing in Irrigation Analysis
Developed an FPGA-based irrigation analysis system using a Scholander pressure chamber, integrating cloud-based monitoring and OTA firmware updates for field deployment.
- Implemented hardware-accelerated image processing on FPGA to analyze droplet formation.
- Developed a high-resolution pressure-volume data collection pipeline for drought stress analysis.
ML-Driven Adaptive LoRaWAN Network Optimization for Scalable IoT Deployments
Developed a self-optimizing LoRaWAN IoT network for adaptive coverage and efficient data transmission.
- Engineered an FPGA-based LoRaWAN gateway with adaptive spreading factor (SF) selection.
- Developed embedded sensor nodes using STM32 and ESP32.
- Implemented real-time network optimization algorithms for collision reduction and retransmissions.
- Developed an ML-based clustering algorithm to group sensor nodes dynamically.
- Applied time-series forecasting models to predict network load fluctuations and optimize routing.
- Designed a self-adaptive LoRaWAN topology management system for efficiency.
Low-Latency FPGA-Based Audio Streaming with Embedded Signal Processing
Developed an FPGA-based audio streaming system with real-time digital-to-analog conversion and Ethernet transmission.
- Designed a high-resolution DAC with dynamic gain control and applied DSP techniques for noise reduction.
- Developed low-jitter real-time Ethernet streaming using a Nios II soft-core processor.
- Created hardware-software co-designed embedded firmware in C on µC/OS-II.
- Validated performance using simulation, hardware-in-the-loop testing, and signal integrity analysis.
- Optimized FPGA resource utilization on Intel Cyclone for stable real-time operation.
Technical Skills
Hardware Design & Digital Systems
- Hardware Description Languages: VHDL (primary), Verilog, SystemVerilog
- FPGA Families: Xilinx Spartan, Intel Cyclone, Lattice iCE40, Gowin Tang Nano 9K
Programming Languages
- Python (primary), R, Matlab, C, Embedded C, C++, TCL, Bash
Toolchains & Simulation
- Toolchains: Vivado, Quartus, IceCube2, Gowin IDE
- Simulation: ModelSim, Questa, Vivado Simulator, GHDL, GTKWave
Machine Learning & Data Processing
- Applications: Anomaly detection, predictive modeling, time-series forecasting, adaptive signal processing
- Algorithms & Models: Neural networks, regression models, unsupervised clustering, reinforcement learning
- Tools & Frameworks: OpenCV, TensorFlow (Lite for edge ML), SciPy, Scikit-learn, Pandas, NumPy, Matlab
Communication & Display Interfaces
- SPI, UART, Ethernet, JTAG, PS/2, USB, HDMI, VGA
Bus & Memory Interfaces
- AMBA-AXI, Wishbone, Avalon, BRAM, DRAM, SRAM, SDRAM
Operating Systems
- Bare-Metal, Micrium µC/OS-II RTOS, Petalinux, FreeRTOS
Debugging & Verification
- Debugging Tools: FLI, VHPIDIRECT, SignalTap II, Vivado ILA
- Verification Frameworks: VUnit, UVVM, OSVVM
Personal Skills
Languages
- English, German, Turkish
Hobbies & Interests
- 3D Modeling (Autodesk Inventor, OnShape)
- 3D Printing, Hiking, Rowing
- Other Technical Interests: Distributed E/E Architectures, Firmware Extraction